J-Trace PRO Cortex

1980€ HT

Emulateur JTAG avec Trace pour Cortex-A, Cortex-R et Cortex-M
Support Trace Instruction Illimitée  
Profiling de code en temps-réel -
Couverture de code temsp-réel

J-Trace PRO Cortex
Avis des clients

J-Trace PRO can capture complete traces over long periods—thereby enabling the recording of infrequent, hard-to-reproduce bugs. This is particularly helpful when the program flow ‘runs off the rails’ and stops in a fault state.

It also supports extended trace features, such as code coverage (so engineers have visibility over which parts of the application code have been executed) and execution profiling (providing visibility as to which instructions have been executed and how often—so hotspots can be addressed and optimization opportunities identified).

  • Streaming Trace probe with USB Superspeed interface
  • Real-time streaming at full System Clock
  • Tune your application with live profiling
  • Satisfy regulatory requirements with instruction-level code coverage
  • Isolate and Identify hard-to-find code defects with unlimited trace
  • Supports Streaming Trace
  • Supports Cortex-A/R/M  targets
  • Full J-Link debug functionality



19-pin JTAG/SWD and Trace connector
J-Trace provides a JTAG/SWD+Trace connector. This connector is a 19-pin connector. It connects to the target via an 1-1 cable. The following table lists the J-Link / J-Trace SWD pinout.

1VTrefInputThis is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators and to control the output logic levels to the target. It is normally fed from Vdd of the target board and must not have a series resistor.
2SWDIO/ TMSI/O / outputJTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS of the target CPU.
4SWCLK/TCKOutputJTAG clock signal to target CPU. It is recommended that this pin is pulled to a defined state of the target board. Typically connected to TCK of the target CPU.
6SWO / TDOInputJTAG data output from target CPU. Typically connected to TDO of the target CPU.
---------This pin (normally pin 7) is not existent on the 19-pin JTAG/SWD and Trace connector.
8TDIOutputJTAG data input of target CPU.- It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI of the target CPU.
9NCNCNot connected inside J-Link. Leave open on target hardware.
10nRESETI/OTarget CPU reset signal. Typically connected to the RESET pin of the target CPU, which is typically called "nRST", "nRESET" or "RESET".
12TRACECLKInputInput trace clock. Trace clock = 1/2 CPU clock.
14TRACEDATA[0]InputInput Trace data pin 0.
16TRACEDATA[1]InputInput Trace data pin 1.
18TRACEDATA[2]InputInput Trace data pin 2.
20TRACEDATA[3]InputInput Trace data pin 3.



Supported OSMicrosoft Windows 2000
Microsoft Windows XP
Microsoft Windows XP x64
Microsoft Windows 2003
Microsoft Windows 2003 x64
Microsoft Windows Vista
Microsoft Windows Vista x64
Microsoft Windows 7
Microsoft Windows 7 x64
Microsoft Windows 8
Microsoft Windows 8 x64
Microsoft Windows 10
Microsoft Windows 10 x64
Mac OSX 10.5 and higher
Electromagnetic compatibility (EMC)EN 55022, EN 55024
Operating temperature+5°C ... +60°C
Storage temperature-20°C ... +65 °C
Relative humidity (non-condensing)Max. 90% rH
Size (without cables)123mm x 68mm x 30mm
Weight(without cables) 120g
Available Interfaces
Ethernet interfaceGigabit
USB interfaceUSB 3.0, SuperSpeed
Target interfaceJTAG/SWD 20-pin (14-pin adapter available)
JTAG/SWD + Trace 19-pin
JTAG/SWD Interface, Electrical
Power supplyUSB powered (max. 400mA)
Target interface voltage (VIF)1.2V ... 5V
LOW level input voltage (VIL)Max. 40% of VIF
HIGH level input voltage (VIH)Min. 60% of VIF
JTAG/SWD Interface, Timing
Data input rise time (Trdi)Max. 20ns
Data input fall time (Tfdi)Max. 20ns
Data output rise time (Trdo)Max. 10ns
Data output fall time (Tfdo)Max. 10ns
Clock rise time (Trc)Max. 10ns
Clock fall time (Tfc)Max. 10ns
Trace Interface, Electrical
Power supplyUSB powered (max. 400mA)
Target interface voltage (VIF)1.2V ... 5V
Voltage interface low pulse (VIL)Max. 40% of VIF
Voltage interface high pulse (VIH)Min. 60% of VIF
Trace Interface, Timing
TRACECLK low pulse width (Twl)Min. 2ns
TRACECLK high pulse width (Twh)Min. 2ns
Data rise time (Trd)Max. 3ns
Data fall time (Tfd)Max. 3ns
Clock rise time (Trc)Max. 3ns
Clock fall time (Tfc)Max. 3ns


1As a legitimate owner of a SEGGER J-Trace, you can always download the latest software free of charge. Though not planned and not likely, we reserve the right to change this policy. Note that older models may not be supported by newer versions of the software. Typically, we support older models with new software at least 3 years after end of life.


  • J-Trace PRO Cortex
  • mini USB cable
  • USB cable
  • Ethernet Cable
  • .05" 20-pin trace cable
  • .1" 20-pin ribbon cable
  • Cortex-M Trace Reference Board
  • USB Power Supply

Recherche rapide
Utilisez des mots-clés pour trouver le produit que vous recherchez.
Recherche avancée
Pour Nous Contacter: O1 3O 50 O9 36
Information fabricant
Page d'accueil de Segger
Autres produits
Informations Paiement
Envoi rapide par UPSPaiement Sécurisé <br/>3D Secure

Paiement Sécurisé
3D Secure

Boutique Mini PC

Boutique Mini PC
Controle Industriel,